This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of: Robust Design, chaired by Herman Casier, Consultant Sigma Delta Converters, chaired by Prof.

Author: Herman Casier

Publisher: Springer Science & Business Media

ISBN: 9400703910

Category: Technology & Engineering

Page: 367

View: 474

Analog Circuit Design contains the contribution of 18 tutorials of the 19th workshop on Advances in Analog Circuit Design. Each part discusses a specific to-date topic on new and valuable design ideas in the area of analog circuit design. Each part is presented by six experts in that field and state of the art information is shared and overviewed. This book is number 20 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of: Robust Design, chaired by Herman Casier, Consultant Sigma Delta Converters, chaired by Prof. Michiel Steyaert, Catholic University Leuven RFID, chaired by Prof. Arthur van Roermund, Eindhoven University of Technology Analog Circuit Design is an essential reference source for analog circuit designers and researchers wishing to keep abreast with the latest development in the field. The tutorial coverage also makes it suitable for use in an advanced design course.

Author: Robert H.M. van VeldhovenPublish On: 2011-01-30

Chapters 5 and 6 showed that a high order 1-bit highly over-sampled ΣΔ
modulator is a very suitable choice for the ADC in a direct conversion receiver.
The modulator can be made with sufficiently high S(Q)NR and linearity at low
power ...

Author: Robert H.M. van Veldhoven

Publisher: Springer Science & Business Media

ISBN: 9400706448

Category: Technology & Engineering

Page: 296

View: 416

Sigma Delta converters are a very popular choice for the A/D converter in multi-standard, mobile and cellular receivers. Key A/D converter specifications are high dynamic range, robustness, scalability, low-power and low EMI. Robust Sigma Delta Converters presents a requirement derivation of a Sigma Delta modulator applied in a receiver for cellular and connectivity, and shows trade-offs between RF and ADC. The book proposes to categorize these requirements in 5 quality indicators which can be used to qualify a system, namely accuracy, robustness, flexibility, efficiency and emission. In the book these quality indicators are used to categorize Sigma Delta converter theory. A few highlights on each of these quality indicators are; Quality indicators: provide a means to quantify system quality. Accuracy: introduction of new Sigma Delta Modulator architectures. Robustness: a significant extension on clock jitter theory based on phase and error amplitude error models. Extension of the theory describing aliasing in Sigma Delta converters for different types of DACs in the feedback loop. Flexibility: introduction of a Sigma Delta converter bandwidth scaling theory leading to very flexible Sigma Delta converters. Efficiency: introduction of new Figure-of-Merits which better reflect performance-power trade-offs. Emission: analysis of Sigma Delta modulators on emission is not part of the book The quality indicators also reveal that, to exploit nowadays advanced IC technologies, things should be done as much as possible digital up to a limit where system optimization allows reducing system margins. At the end of the book Sigma Delta converter implementations are shown which are digitized on application-, architecture-, circuit- and layout-level. Robust Sigma Delta Converters is written under the assumption that the reader has some background in receivers and in A/D conversion.

[13] J. Cherry and W. Snelgrove, Continuous-Time Delta-Sigma Modulators for
HighSpeed A/D Conversion, Kluwer Academic ... [23] R. H. van Veldhoven and
A. H. M. van Roermund, Robust Sigma Delta Converters, Springer, 2011.

Author: Jose M. de la Rosa

Publisher: John Wiley & Sons

ISBN: 9781118568439

Category: Technology & Engineering

Page: 432

View: 488

A comprehensive overview of Sigma-Delta Analog-to-DigitalConverters (ADCs) and a practical guide to their design innano-scale CMOS for optimal performance. This book presents a systematic and comprehensive compilation ofsigma-delta converter operating principles, the new advances inarchitectures and circuits, design methodologies and practicalconsiderations − going from system-level specifications tosilicon integration, packaging and measurements, with emphasis onnanometer CMOS implementation. The book emphasizes practical designissues – from high-level behavioural modelling inMATLAB/SIMULINK, to circuit-level implementation in Cadence DesignFrameWork II. As well as being a comprehensive reference to thetheory, the book is also unique in that it gives special importanceon practical issues, giving a detailed description of the differentsteps that constitute the whole design flow of sigma-delta ADCs. The book begins with an introductory survey of sigma-deltamodulators, their fundamentals architectures and synthesis methodscovered in Chapter 1. In Chapter 2, the effect of main circuiterror mechanisms is analysed, providing the necessary understandingof the main practical issues affecting the performance ofsigma-delta modulators. The knowledge derived from the first twochapters is presented in the book as an essential part of thesystematic top-down/bottom-up synthesis methodology of sigma-deltamodulators described in Chapter 3, where a time-domain behaviouralsimulator named SIMSIDES is described and applied to the high-leveldesign and verification of sigma-delta ADCs. Chapter 4 movesfarther down from system-level to the circuit and physical level,providing a number of design recommendations and practical recipesto complete the design flow of sigma-delta modulators. To concludethe book, Chapter 5 gives an overview of the state-of-the-artsigma-delta ADCs, which are exhaustively analysed in order toextract practical design guidelines and to identify the incomingtrends, design challenges as well as practical solutions proposedby cutting-edge designs. Offers a complete survey of sigma-delta modulator architecturesfrom fundamentals to state-of-the art topologies, considering bothswitched-capacitor and continuous-time circuit implementations Gives a systematic analysis and practical design guide ofsigma-delta modulators, from a top-down/bottom-up perspective,including mathematical models and analytical procedures,behavioural modeling in MATLAB/SIMULINK, macromodeling, andcircuit-level implementation in Cadence Design FrameWork II, chipprototyping, and experimental characterization. Systematic compilation of cutting-edge sigma-deltamodulators Complete description of SIMSIDES, a time-domain behaviouralsimulator implemented in MATLAB/SIMULINK Plenty of examples, case studies, and simulation test benches,covering the different stages of the design flow of sigma-deltamodulators A number of electronic resources, including SIMSIDES, thestatistical data used in the state-of-the-art survey, as well asmany design examples and test benches are hosted on a companionwebsite Essential reading for Researchers and electronics engineeringpractitioners interested in the design of high-performance dataconverters integrated in nanometer CMOS technologies; mixed-signaldesigners.

[14] V. Peluso, M. Steyaert, and W. Sansen, Design of Low Voltage Low Power
CMOS Delta Sigma A/D Converters. ... F. Gerfers, Continuous Time Sigma Delta
A/D Conversion: Fundamentals, Performance Limits and Robust Implementations
.

Author: Jose M. de la Rosa

Publisher: John Wiley & Sons

ISBN: 9781119275763

Category: Technology & Engineering

Page: 568

View: 865

Thoroughly revised and expanded to help readers systematically increase their knowledge and insight about Sigma-Delta Modulators Sigma-Delta Modulators (SDMs) have become one of the best choices for the implementation of analog/digital interfaces of electronic systems integrated in CMOS technologies. Compared to other kinds of Analog-to-Digital Converters (ADCs), Σ∆Ms cover one of the widest conversion regions of the resolution-versus-bandwidth plane, being the most efficient solution to digitize signals in an increasingly number of applications, which span from high-resolution low-bandwidth digital audio, sensor interfaces, and instrumentation, to ultra-low power biomedical systems and medium-resolution broadband wireless communications. Following the spirit of its first edition, Sigma-Delta Converters: Practical Design Guide, 2nd Edition takes a comprehensive look at SDMs, their diverse types of architectures, circuit techniques, analysis synthesis methods, and CAD tools, as well as their practical design considerations. It compiles and updates the current research reported on the topic, and explains the multiple trade-offs involved in the whole design flow of Sigma-Delta Modulators—from specifications to chip implementation and characterization. The book follows a top-down approach in order to provide readers with the necessary understanding about recent advances, trends, and challenges in state-of-the-art Σ∆Ms. It makes more emphasis on two key points, which were not treated so deeply in the first edition: It includes a more detailed explanation of Σ∆Ms implemented using Continuous-Time (CT) circuits, going from system-level synthesis to practical circuit limitations. It provides more practical case studies and applications, as well as a deeper description of the synthesis methodologies and CAD tools employed in the design of Σ∆ converters. Sigma-Delta Converters: Practical Design Guide, 2nd Edition serves as an excellent textbook for undergraduate and graduate students in electrical engineering as well as design engineers working on SD data-converters, who are looking for a uniform and self-contained reference in this hot topic. With this goal in mind, and based on the feedback received from readers, the contents have been revised and structured to make this new edition a unique monograph written in a didactical, pedagogical, and intuitive style.

This comprehensive book deals with all relevant aspects arising during the analysis, design and simulation of the now widespread continuous-time implementations of sigma-delta modulators.

Author: Friedel Gerfers

Publisher: Springer Science & Business Media

ISBN: 9783540284734

Category: Technology & Engineering

Page: 242

View: 848

Sigma-delta A/D converters are a key building block in wireless and multimedia applications. This comprehensive book deals with all relevant aspects arising during the analysis, design and simulation of the now widespread continuous-time implementations of sigma-delta modulators. The results of several years of research by the authors in the field of CT sigma-delta modulators are covered, including the analysis and modeling of different CT modulator architectures, CT/DT loop filter synthesis, a detailed error analysis of all components, and possible compensation/correction schemes for the non-ideal behavior in CT sigma-delta modulators. Guidance for obtaining low-power consumption and several practical implementations are also presented. It is shown that all the proposed new theories, architectures and possible correction techniques have been confirmed by measurements on discrete or integrated circuits. Quantitative results are also provided, thus enabling prediction of the resulting accuracy.

Only recently have oversampling methods used for high resolution A/D and D/A conversion become popular. This is the first book to address all aspects of the subject and to compare and evaluate various design approaches.

Author: J. G. Candy

Publisher: Wiley-IEEE Press

ISBN: UOM:39015022231099

Category: Computers

Page: 499

View: 855

This now famous anthology brings together various aspects of oversampling methods and compares and evaluates design approaches. It describes the theoretical analysis of converter performances, the actual design of converters and their simulation, circuit implementations, and applications.

This book discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations.

Author: Yves Geerts

Publisher: Springer Science & Business Media

ISBN: 9780306480157

Category: Technology & Engineering

Page: 226

View: 597

This book discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies.

Thus, an Analog-to-Digital Converter (ADC) is employed. Sigma-Delta
Modulators (ΣΔM), given their native linearity, robust analog implementation and
reduced antialiasing filtering requirements, are the best option for low frequency,
...

Author: Nuno Pereira

Publisher: Springer

ISBN: 9783319116389

Category: Technology & Engineering

Page: 76

View: 717

This book focuses on the design of a 3rd Order CT-ΣΔM where the integrator stages of the filter are implemented with Bipolar-Junction Transistors (BJT) differential pairs. These circuits are fully analyzed and the design method is carefully explained. The design method is validated through experimental measurements of several prototype circuits.

In a similar way, pulse density modulation was used for robust data transmission
in telephony. In the single-bit, delta-modulated code all bits are of equal weight
and any bit-flip causes only a small error. In a multi-level PCM code though a ...

Author: Kathleen Philips

Publisher: Springer Science & Business Media

ISBN: 9781402046803

Category: Technology & Engineering

Page: 278

View: 297

The book gives an overview of the state-of-the-art in SigmaDelta design and of the challenges for future realizations. It provides an understanding of the fundamental power efficiency of SigmaDelta converters. In addition, it presents an analysis of the power consumption in the decimation filter. Understanding these power/performance trade-offs, it becomes clear that straight-forward digitization of a conditioning channel, i.e. exchanging analog for digital conditioning, comes at a major power penalty.

The sigma - delta technique for A / D and D / A conversion is widely used in
consumer professional audio circuits for both medium and high performance
applications . Robust sigmadelta A / D converters have been designed for
commercial ...

An example of a standard system building block is an Analog to Digital Converter
( ADC ) , unavoidable as interface between the analog world and the digital
signal processing ... Probably the most robust way of implementation of a AE I.

Author: Vincenzo Peluso

Publisher: Springer Science & Business Media

ISBN: 0792384172

Category: Technology & Engineering

Page: 174

View: 851

Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters investigates the feasibility of designing Delta-Sigma Analog to Digital Converters for very low supply voltage (lower than 1.5V) and low power operation in standard CMOS processes. The chosen technique of implementation is the Switched Opamp Technique which provides Switched Capacitor operation at low supply voltage without the need to apply voltage multipliers or low VtMOST devices. A method of implementing the classic single loop and cascaded Delta-Sigma modulator topologies with half delay integrators is presented. Those topologies are studied in order to find the parameters that maximise the performance in terms of peak SNR. Based on a linear model, the performance degradations of higher order single loop and cascaded modulators, compared to a hypothetical ideal modulator, are quantified. An overview of low voltage Switched Capacitor design techniques, such as the use of voltage multipliers, low VtMOST devices and the Switched Opamp Technique, is given. An in-depth discussion of the present status of the Switched Opamp Technique covers the single-ended Original Switched Opamp Technique, the Modified Switched Opamp Technique, which allows lower supply voltage operation, and differential implementation including common mode control techniques. The restrictions imposed on the analog circuits by low supply voltage operation are investigated. Several low voltage circuit building blocks, some of which are new, are discussed. A new low voltage class AB OTA, especially suited for differential Switched Opamp applications, together with a common mode feedback amplifier and a comparator are presented and analyzed. As part of a systematic top-down design approach, the non-ideal charge transfer of the Switched Opamp integrator cell is modeled, based upon several models of the main opamp non-ideal characteristics. Behavioral simulations carried out with these models yield the required opamp specifications that ensure that the intended performance is met in an implementation. A power consumption analysis is performed. The influence of all design parameters, especially the low power supply voltage, is highlighted. Design guidelines towards low power operation are distilled. Two implementations are presented together with measurement results. The first one is a single-ended implementation of a Delta-Sigma ADC operating with 1.5V supply voltage and consuming 100 &mgr;W for a 74 dB dynamic range in a 3.4 kHz bandwidth. The second implementation is differential and operates with 900 mV. It achieves 77 dB dynamic range in 16 kHz bandwidth and consumes 40 &mgr;W. Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters is essential reading for analog design engineers and researchers.

Abstract Amongst other things, time-to-digital converters are used in high energy
and particle physics, for measurement ... A continuous time sigma delta
modulator with time domain quantizer is presented as a classic approach and an ADC based on an ... 1 This chapter discusses only a choice of the most promising
concepts for high linearity, high resolution, high bandwidth, and robust
implementation.

Author: Stephan Henzler

Publisher: Springer Science & Business Media

ISBN: 9789048186280

Category: Technology & Engineering

Page: 124

View: 737

Micro-electronics and so integrated circuit design are heavily driven by technology scaling. The main engine of scaling is an increased system performance at reduced manufacturing cost (per system). In most systems digital circuits dominate with respect to die area and functional complexity. Digital building blocks take full - vantage of reduced device geometries in terms of area, power per functionality, and switching speed. On the other hand, analog circuits rely not on the fast transition speed between a few discrete states but fairly on the actual shape of the trans- tor characteristic. Technology scaling continuously degrades these characteristics with respect to analog performance parameters like output resistance or intrinsic gain. Below the 100 nm technology node the design of analog and mixed-signal circuits becomes perceptibly more dif cult. This is particularly true for low supply voltages near to 1V or below. The result is not only an increased design effort but also a growing power consumption. The area shrinks considerably less than p- dicted by the digital scaling factor. Obviously, both effects are contradictory to the original goal of scaling. However, digital circuits become faster, smaller, and less power hungry. The fast switching transitions reduce the susceptibility to noise, e. g. icker noise in the transistors. There are also a few drawbacks like the generation of power supply noise or the lack of power supply rejection.

This book represents a contribution to the design of sigma-delta () modulators
intended for the A/D conversion in multi-standard ... On the other, both principles
make them robust with respect to non-idealities of an integrated implementation.

Author: Alonso Morgado

Publisher: Springer Science & Business Media

ISBN: 1461400376

Category: Technology & Engineering

Page: 288

View: 687

This book presents innovative solutions for the implementation of Sigma-Delta Modulation (SDM) based Analog-to-Digital Conversion (ADC), required for the next generation of wireless hand-held terminals. These devices will be based on the so-called multi-standard transceiver chipsets, integrated in nanometer CMOS technologies. One of the most challenging and critical parts in such transceivers is the analog-digital interface, because of the assorted signal bandwidths and dynamic ranges that can be required to handle the A/D conversion for several operation modes. This book describes new adaptive and reconfigurable SDM ADC topologies, circuit strategies and synthesis methods, specially suited for multi-standard wireless telecom systems and future Software-defined-radios (SDRs) integrated in nanoscale CMOS. It is a practical book, going from basic concepts to the frontiers of SDM architectures and circuit implementations, which are explained in a didactical and systematic way. It gives a comprehensive overview of the state-of-the-art performance, challenges and practical solutions, providing the necessary insight to implement successful design, through an efficient design and synthesis methodology. Readers will learn a number of practical skills – from system-level design to experimental measurements and testing.

This requires each channel to operate at half the sampling rate i.e. 4 GHz. This is enabled by a high-speed pipelined MASH structure with robust static logic.

Author: Ameya Bhide

Publisher: Linköping University Electronic Press

ISBN: 9789175190174

Category:

Page: 117

View: 344

Digital-to-analog (D/A) converters (or DACs) are one the fundamental building blocks of wireless transmitters. In order to support the increasing demand for highdata-ate communication, a large bandwidth is required from the DAC. With the advances in CMOS scaling, there is an increasing trend of moving a large part of the transceiver functionality to the digital domain in order to reduce the analog complexity and allow easy reconguration for multiple radio standards. ΔΣ DACs can t very well into this trend of digital architectures as they contain a large digital signal processing component and oer two advantages over the traditionally used Nyquist DACs. Firstly, the number of DAC unit current cells is reduced which relaxes their matching and output impedance requirements and secondly, the reconstruction lter order is reduced. Achieving a large bandwidth from ΔΣ DACs requires a very high operating frequency of many-GHz from the digital blocks due to the oversampling involved. This can be very challenging to achieve using conventional ΔΣ DAC architectures, even in nanometer CMOS processes. Time-interleaved ΔΣ (TIDSM) DACs have the potential of improving the bandwidth and sampling rate by relaxing the speed of the individual channels. However, they have received only some attention over the past decade and very few previous works been reported on this topic. Hence, the aim of this dissertation is to investigate architectural and circuit techniques that can further enhance the bandwidth and sampling rate of TIDSM DACs. The rst work is an 8-GS/s interleaved ΔΣ DAC prototype IC with 200-MHz bandwidth implemented in 65-nm CMOS. The high sampling rate is achieved by a two-channel interleaved MASH 1-1 digital ΔΣ modulator with 3-bit output, resulting in a highly digital DAC with only seven current cells. Two-channel interleaving allows the use of a single clock for both the logic and the nal multiplexing. This requires each channel to operate at half the sampling rate i.e. 4 GHz. This is enabled by a high-speed pipelined MASH structure with robust static logic. Measurement results from the prototype show that the DAC achieves 200-MHz bandwidth, –57-dBc IM3 and 26-dB SNDR, with a power consumption of 68-mW at 1-V digital and 1.2-V analog supplies. This architecture shows good potential for use in the transmitter baseband. While a good linearity is obtained from this DAC, the SNDR is found to be limited by the testing setup for sending high-speed digital data into the prototype. The performance of a two-channel interleaved ΔΣ DAC is found to be very sensitive to the duty-cycle of the half-rate clock. The second work analyzes this eect mathematically and presents a new closed-form expression for the SNDR loss of two-channel DACs due to the duty cycle error (DCE) for a noise transfer function (NTF) of (1 — z—1)n. It is shown that a low-order FIR lter after the modulator helps to mitigate this problem. A closed-form expression for the SNDR loss in the presence of this lter is also developed. These expressions are useful for choosing a suitable modulator and lter order for an interleaved ΔΣ DAC in the early stage of the design process. A comparison between the FIR lter and compensation techniques for DCE mitigation is also presented. The nal work is a 11 GS/s 1.1 GHz bandwidth time-interleaved DAC prototype IC in 65-nm CMOS for the 60-GHz radio baseband. The high sampling rate is again achieved by using a two-channel interleaved MASH 1-1 architecture with a 4-bit output i.e only fteen analog current cells. The single clock architecture for the logic and the multiplexing requires each channel to operate at 5.5 GHz. To enable this, a new look-ahead technique is proposed that decouples the two channels within the modulator feedback path thereby improving the speed as compared to conventional loop-unrolling. Full speed DAC testing is enabled by an on-chip 1 Kb memory whose read path also operates at 5.5 GHz. Measurement results from the prototype show that the ΔΣ DAC achieves >53 dB SFDR, < —49 dBc IM3 and 39 dB SNDR within a 1.1 GHz bandwidth while consuming 117 mW from 1 V digital/1.2 V analog supplies. The proposed ΔΣ DAC can satisfy the spectral mask of the 60-GHz radio IEEE 802.11ad WiGig standard with a second order reconstruction lter.

1593 - 1600 ) This paper proposes faster and higher - resolution sigma - delta
ADCs with an analog feedback . A conventional sigma - delta ADC has a very
simple construction and a robust instrumentation for parasitic effects , but it
converts ...

The technique of oversampling and pushing noise power out of the signal band
is a robust means of implementing high - resolution analog to digital converters .
The most frequent application of sigma - delta ADC is in audio codec because ...

All of these factors degrade the performance of sigma delta converters in
wideband applications . ... In order to have the modulator design more robust to
analog circuit nonidealities , authors in [ 5 ] have suggested a novel topology
known as ...

Author: Hendrik van der PloegPublish On: 2006-09-13

converter. architecture. comparison. 3.1. Introduction. A number of different A/D
architectures exist for a given set of specifications. ... The second category
includes pipe-line and successive approximation, where in general only Sigma Delta, counting and (dual) slope A/D ... They need to be robust with respect to
scaling.

Author: Hendrik van der Ploeg

Publisher: Springer Science & Business Media

ISBN: 9781402046353

Category: Technology & Engineering

Page: 190

View: 168

This book analyses different A/D-converter architectures with an emphasis on the maximum achievable power efficiency. It also provides an accessible overview of the state-of-the art in calibration techniques for Nyquist A/D converters. The calibration techniques presented are applicable to other analog-to-digital systems, such as those applied in integrated receivers. They allow implementation without introducing a speed or power penalty.

Converters , design and anal , loinovici , A. , + , T - CASI Jun 06 1403 Switched
capacitor filters 10.7 - MHz sixth - order SC ladder filter ... Singh , V. , T - CASI Jan
06 214-215 delayed recurrent neural nets , noise disturbance , robust stabil . and robust periodicity . ... Siu - Chung Wong , + , T - CASI Feb 06 454-462 estimation
of an initial condition of sigma - delta modulators via projection onto convex sets .